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The Real AI Bottleneck Isn’t Chips. It’s the Packaging.

Everyone talks about who makes the best AI chip. Almost nobody talks about who can package it.

NVIDIA has reserved approximately 60% of TSMC’s CoWoS advanced packaging capacity for the next two years. That’s roughly 595,000 wafers, with 510,000 allocated for its next-generation Rubin architecture. Google gets about 90,000 wafers for TPUs. Meta gets 50,000. OpenAI gets 10,000. Everyone else gets in line.

CoWoS, short for Chip-on-Wafer-on-Substrate, is the technology that connects AI processors to their high-bandwidth memory stacks. Without it, a cutting-edge GPU is just a very expensive piece of silicon that can’t talk to its own memory fast enough to be useful. TSMC is the dominant provider. NVIDIA is the dominant customer. And the capacity is fully booked.

TSMC is scaling hard. Production is ramping from roughly 75,000 wafers per month today to a projected 130,000 to 150,000 by end of 2026. They’re building two new packaging facilities in Taiwan, outsourcing overflow to ASE, Amkor, and SPIL (240,000 to 270,000 wafers annually to third parties), and planning two Arizona packaging sites. But the Arizona facilities won’t handle CoWoS until at least 2027 or 2028. The bottleneck stays in Taiwan.

Enter Intel.

Intel’s alternative technology is called EMIB, Embedded Multi-die Interconnect Bridge. Instead of placing chips on top of a large silicon interposer (TSMC’s approach), Intel embeds small silicon bridges directly into the package substrate, only where two chips need to connect. Less silicon. Lower cost. Potentially more scalable.

For years, EMIB was a technology in search of customers. That changed when Elon Musk tapped Intel as the foundry partner for his $25 billion Terafab project at Giga Texas. Intel will use its 18A process node and EMIB packaging to manufacture custom AI chips for Tesla’s humanoid robotics program, xAI’s training infrastructure, and SpaceX’s radiation-hardened processors.

That’s three of the most demanding hardware customers in the world choosing Intel’s packaging over joining TSMC’s waitlist.

Google and Amazon are reportedly in talks to use EMIB for their own custom chips (TPUs and Trainium, respectively). Deal commitments are reportedly in the billions of dollars per year in packaging revenue alone, with Intel expecting to share details at its April 23 earnings call.

The Packaging Power Map

What’s happening is a structural split in the AI supply chain that most coverage misses entirely. The semiconductor industry spent decades optimizing transistor density. Moore’s Law was a lithography story. Now the constraint has shifted. You can design a brilliant chip, but if you can’t package it with enough memory bandwidth to feed the model, it doesn’t matter.

NVIDIA understood this first and locked the door behind them. By reserving 60% of CoWoS capacity, they didn’t just secure their own supply. They constrained everyone else’s. Every wafer NVIDIA books is a wafer Google, Amazon, Meta, and every AI startup can’t get.

Intel is positioning itself as the American escape valve from that constraint. EMIB delivers roughly 40% gross margins for Intel’s foundry business. The Terafab, the Google and Amazon talks, the new packaging lines in New Mexico and Malaysia are all pieces of the same play: become the packaging alternative for every AI company that doesn’t want to wait in TSMC’s NVIDIA-dominated queue.

The question nobody is asking publicly: what happens when the next generation of AI models requires hardware that physically can’t be manufactured fast enough? We might already be there. CoWoS capacity is growing at 80% annually. AI compute demand is growing faster than that. The math doesn’t work unless Intel’s alternative actually scales.

What This Means for Everyday People

Every AI product you use, ChatGPT, Claude, Gemini, Google Search, depends on chips that went through advanced packaging. The speed at which new AI capabilities reach consumers is now gated by how fast TSMC and Intel can wrap chips in silicon. When people say “AI is moving too fast,” the packaging bottleneck is one reason it’s actually moving slower than it could.